The present invention relates generally to a stacked semiconductor package, and more particularly to a stacked semiconductor package having reduced volume and reliability.
As a current design trend, semiconductor chips capable of storing and processing huge amounts of data within extremely short time periods and semiconductor packages having the semiconductor chips have and are being developed.
Stacked semiconductor packages having at least two semiconductor chips stacked together have been proposed for use in enhancing data storage capacities and for use in increasing data processing speeds.
A conventional stacked semiconductor package includes at least two semiconductor chips having through-electrodes, and connection members interposed between the through-electrodes to electrically connect the through-electrodes of the respective semiconductor chips.
The conventional stacked semiconductor package requires a process for forming the through-electrodes in respective semiconductor chips, a process for stacking the respective semiconductor chips formed with the through-electrodes, and a process for electrically connecting the respective through-electrodes. Therefore, the number of processes for manufacturing the stacked semiconductor package is high, and the manufacturing cost of the stacked semiconductor package is high as well.
Further, the process for forming the through-electrodes in the respective semiconductor chips requires a high degree of precision, and therefore defects frequently occur during the formation of the through-electrodes.
Further, the thickness and volume of the stacked semiconductor package markedly increase due to the presence of the connection members for electrically connecting the through-electrodes of the respective stacked semiconductor chips.